OpenVizsla hardware is mainly composed of four chips connected together:
- FTDI FT2232H High-Speed USB FIFO
- Xilinx Spartan 6 LX FPGA>
- Micron MT48LC16M16A2P-xx SDRAM
- SMSC USB3343 ULPI PHY
- communications with the FT2232H over USB using a proprietary USB protocol
- FPGA configured with Slave SelectMAP
- communications with the ULPI PHY layer compatible with ULPI and UTMU+ specifications
- open-source software for validation purposes – ovctl
OpenVizsla features great developer experience by building firmware with Xilinx ISE Webpack toolchain.
Important: Pin headers visible on the pictures are optional, please contact us if you require them in the product.